What is IP?

IP is an acronym for Intellectual Property. IP has a broad definition that includes patents, copyrights, and trademarks, as well as a number of other more specific areas such as IC layout. In our case, our VHDL or Verilog source code is our IP, and we license the rights to use it.

What is an SOC?

An SOC is an integrated circuit (often an FPGA) that integrates multiple components of an electronic system into a single chip (a System On a Chip).

What is an FPGA?

An FPGA is a configurable integrated circuit the configuration of which is usually specified using a hardware description language (HDL). The acronym FPGA stands for Field Programmable Gate Array.

What is HDL?

Hardware Description Language (e.g. VHDL and Verilog)

What is RTL?

Register Transfer Language (synonymous with HDL)

What is VHDL?

An IEEE standard hardware description language. The IEEE Standard VHDL-1076 Language Reference Manual states that VHDL: " is a formal notation intended for use in all phases of the creation of electronic systems. ... it supports the development, verification, synthesis, and testing of hardware designs, the communication of hardware design data ..."

What is Verilog?

Another IEEE standard hardware description language.

What is an IP library component?

An IP library component synthesizable is a standard function such as a microprocessor or peripheral function that can be used as part of a larger SOC design. By using off-the shelf proven cores, designers don't waste time re-inventing the wheel and their efforts can be focused where the most value can be added.

What is Technology Independence?

Technology independence means that a design can be ported to any circuit technology and the design will function the same. It may be faster/slower or higher/lower power, but it will always give you the same answer. Technology independence is achieved through using a standard HDL such as VHDL or Verilog, and by adherence to synchronous design practice. Our cores are technology independent and can be ported to and technology that is supported by the HDL synthesis tools.

How do I license an IP component?

Flexible licensing terms are available either for the HDL source code or for a synthesized FPGA netlist. Payment can be either a one-time fee or on a royalty basis.

How have the IP components been validated?

Most cores have been validated in an FPGA implementation. See our IP Library page for more info.

Back to Home | IP Library | SOC | Case Studies | Contact Us

terms of use